forked from mfulz_github/qmk_firmware
Minor documentation improvements.
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@ -100,61 +100,61 @@
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/* Macros: */
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/** \name SPI Prescaler Configuration Masks */
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//@{
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 2. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 2. */
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#define SPI_SPEED_FCPU_DIV_2 SPI_USE_DOUBLESPEED
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 4. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 4. */
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#define SPI_SPEED_FCPU_DIV_4 0
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 8. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 8. */
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#define SPI_SPEED_FCPU_DIV_8 (SPI_USE_DOUBLESPEED | (1 << SPR0))
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 16. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 16. */
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#define SPI_SPEED_FCPU_DIV_16 (1 << SPR0)
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 32. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 32. */
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#define SPI_SPEED_FCPU_DIV_32 (SPI_USE_DOUBLESPEED | (1 << SPR1))
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 64. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 64. */
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#define SPI_SPEED_FCPU_DIV_64 (SPI_USE_DOUBLESPEED | (1 << SPR1) | (1 << SPR0))
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 128. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 128. */
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#define SPI_SPEED_FCPU_DIV_128 ((1 << SPR1) | (1 << SPR0))
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//@}
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/** \name SPI SCK Polarity Configuration Masks */
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//@{
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/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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/** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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#define SPI_SCK_LEAD_RISING (0 << CPOL)
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/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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/** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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#define SPI_SCK_LEAD_FALLING (1 << CPOL)
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//@}
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/** \name SPI Sample Edge Configuration Masks */
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//@{
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/** SPI data sample mode mask for \c SPI_Init(). Indicates that the data should sampled on the leading edge. */
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/** SPI data sample mode mask for \ref SPI_Init(). Indicates that the data should sampled on the leading edge. */
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#define SPI_SAMPLE_LEADING (0 << CPHA)
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/** SPI data sample mode mask for \c SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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/** SPI data sample mode mask for \ref SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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#define SPI_SAMPLE_TRAILING (1 << CPHA)
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//@}
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/** \name SPI Data Ordering Configuration Masks */
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//@{
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/** SPI data order mask for \c SPI_Init(). Indicates that data should be shifted out MSB first. */
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/** SPI data order mask for \ref SPI_Init(). Indicates that data should be shifted out MSB first. */
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#define SPI_ORDER_MSB_FIRST (0 << DORD)
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/** SPI data order mask for \c SPI_Init(). Indicates that data should be shifted out LSB first. */
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/** SPI data order mask for \ref SPI_Init(). Indicates that data should be shifted out LSB first. */
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#define SPI_ORDER_LSB_FIRST (1 << DORD)
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//@}
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/** \name SPI Mode Configuration Masks */
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//@{
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/** SPI mode mask for \c SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
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/** SPI mode mask for \ref SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
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#define SPI_MODE_SLAVE (0 << MSTR)
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/** SPI mode mask for \c SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
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/** SPI mode mask for \ref SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
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#define SPI_MODE_MASTER (1 << MSTR)
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//@}
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@ -29,7 +29,7 @@
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*/
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/** \file
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* \brief Serial USART Master SPI Mode Peripheral Driver (XMEGA)
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* \brief Master SPI Mode Serial USART Peripheral Driver (XMEGA)
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*
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* On-chip Master SPI mode USART driver for the XMEGA AVR microcontrollers.
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*
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*/
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/** \ingroup Group_SerialSPI
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* \defgroup Group_SerialSPI_AVR8 Serial USART Peripheral Driver (AVR8)
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* \defgroup Group_SerialSPI_AVR8 Master SPI Mode Serial USART Peripheral Driver (AVR8)
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*
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* \section Sec_ModDescription Module Description
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* On-chip serial USART driver for the 8-bit AVR8 microcontrollers.
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/* Macros: */
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/** \name SPI SCK Polarity Configuration Masks */
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//@{
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/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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/** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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#define USART_SPI_SCK_LEAD_RISING (0 << UCPOL)
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/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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/** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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#define USART_SPI_SCK_LEAD_FALLING (1 << UCPOL)
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//@}
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/** \name SPI Sample Edge Configuration Masks */
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//@{
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/** SPI data sample mode mask for \c SerialSPI_Init(). Indicates that the data should sampled on the leading edge. */
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/** SPI data sample mode mask for \ref SerialSPI_Init(). Indicates that the data should sampled on the leading edge. */
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#define USART_SPI_SAMPLE_LEADING (0 << UPCHA)
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/** SPI data sample mode mask for \c SerialSPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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/** SPI data sample mode mask for \ref SerialSPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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#define USART_SPI_SAMPLE_TRAILING (1 << UPCHA)
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//@}
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/** \name SPI Data Ordering Configuration Masks */
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//@{
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/** SPI data order mask for \c Serial_SPIInit(). Indicates that data should be shifted out MSB first. */
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/** SPI data order mask for \ref SerialSPI_Init(). Indicates that data should be shifted out MSB first. */
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#define USART_SPI_ORDER_MSB_FIRST (0 << UDORD)
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/** SPI data order mask for \c Serial_SPIInit(). Indicates that data should be shifted out LSB first. */
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/** SPI data order mask for \ref SerialSPI_Init(). Indicates that data should be shifted out LSB first. */
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#define USART_SPI_ORDER_LSB_FIRST (1 << UDORD)
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//@}
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@ -97,61 +97,61 @@
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/* Macros: */
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/** \name SPI Prescaler Configuration Masks */
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//@{
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 2. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 2. */
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#define SPI_SPEED_FCPU_DIV_2 SPI_USE_DOUBLESPEED
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 4. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 4. */
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#define SPI_SPEED_FCPU_DIV_4 0
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 8. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 8. */
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#define SPI_SPEED_FCPU_DIV_8 (SPI_USE_DOUBLESPEED | (1 << SPI_PRESCALER_gp))
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 16. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 16. */
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#define SPI_SPEED_FCPU_DIV_16 (1 << SPI_PRESCALER_gp)
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 32. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 32. */
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#define SPI_SPEED_FCPU_DIV_32 (SPI_USE_DOUBLESPEED | (2 << SPI_PRESCALER_gp))
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 64. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 64. */
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#define SPI_SPEED_FCPU_DIV_64 (2 << SPI_PRESCALER_gp)
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/** SPI prescaler mask for \c SPI_Init(). Divides the system clock by a factor of 128. */
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/** SPI prescaler mask for \ref SPI_Init(). Divides the system clock by a factor of 128. */
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#define SPI_SPEED_FCPU_DIV_128 (3 << SPI_PRESCALER_gp)
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//@}
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/** \name SPI SCK Polarity Configuration Masks */
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//@{
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/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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/** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the rising edge. */
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#define SPI_SCK_LEAD_RISING 0
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/** SPI clock polarity mask for \c SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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/** SPI clock polarity mask for \ref SPI_Init(). Indicates that the SCK should lead on the falling edge. */
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#define SPI_SCK_LEAD_FALLING SPI_MODE1_bm
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//@}
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/** \name SPI Sample Edge Configuration Masks */
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//@{
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/** SPI data sample mode mask for \c SPI_Init(). Indicates that the data should sampled on the leading edge. */
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/** SPI data sample mode mask for \ref SPI_Init(). Indicates that the data should sampled on the leading edge. */
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#define SPI_SAMPLE_LEADING 0
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/** SPI data sample mode mask for \c SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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/** SPI data sample mode mask for \ref SPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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#define SPI_SAMPLE_TRAILING SPI_MODE0_bm
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//@}
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/** \name SPI Data Ordering Configuration Masks */
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//@{
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/** SPI data order mask for \c SPI_Init(). Indicates that data should be shifted out MSB first. */
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/** SPI data order mask for \ref SPI_Init(). Indicates that data should be shifted out MSB first. */
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#define SPI_ORDER_MSB_FIRST 0
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/** SPI data order mask for \c SPI_Init(). Indicates that data should be shifted out LSB first. */
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/** SPI data order mask for \ref SPI_Init(). Indicates that data should be shifted out LSB first. */
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#define SPI_ORDER_LSB_FIRST SPI_DORD_bm
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//@}
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/** \name SPI Mode Configuration Masks */
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//@{
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/** SPI mode mask for \c SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
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/** SPI mode mask for \ref SPI_Init(). Indicates that the SPI interface should be initialized into slave mode. */
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#define SPI_MODE_SLAVE 0
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/** SPI mode mask for \c SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
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/** SPI mode mask for \ref SPI_Init(). Indicates that the SPI interface should be initialized into master mode. */
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#define SPI_MODE_MASTER SPI_MASTER_bm
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//@}
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*/
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/** \file
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* \brief Serial USART Master SPI Mode Peripheral Driver (XMEGA)
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* \brief Master SPI Mode Serial USART Peripheral Driver (XMEGA)
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*
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* On-chip Master SPI mode USART driver for the XMEGA AVR microcontrollers.
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*
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*/
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/** \ingroup Group_SerialSPI
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* \defgroup Group_SerialSPI_XMEGA Serial USART Peripheral Driver (XMEGA)
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* \defgroup Group_SerialSPI_XMEGA Master SPI Mode Serial USART Peripheral Driver (XMEGA)
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*
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* \section Sec_ModDescription Module Description
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* On-chip serial USART driver for the XMEGA AVR microcontrollers.
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*
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* \code
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* // Initialize the Master SPI mode USART driver before first use, with 1Mbit baud
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* SerialSPI_Init(&USARTD, (USART_SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_ORDER_MSB_FIRST), 1000000);
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* SerialSPI_Init(&USARTD0, (USART_SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_ORDER_MSB_FIRST), 1000000);
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*
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* // Send several bytes, ignoring the returned data
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* SerialSPI_SendByte(&USARTD, 0x01);
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* SerialSPI_SendByte(&USARTD, 0x02);
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* SerialSPI_SendByte(&USARTD, 0x03);
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* SerialSPI_SendByte(&USARTD0, 0x01);
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* SerialSPI_SendByte(&USARTD0, 0x02);
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* SerialSPI_SendByte(&USARTD0, 0x03);
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*
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* // Receive several bytes, sending a dummy 0x00 byte each time
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* uint8_t Byte1 = SerialSPI_ReceiveByte(&USARTD);
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* uint8_t Byte3 = SerialSPI_ReceiveByte(&USARTD);
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*
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* // Send a byte, and store the received byte from the same transaction
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* uint8_t ResponseByte = SerialSPI_TransferByte(&USARTD, 0xDC);
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* uint8_t ResponseByte = SerialSPI_TransferByte(&USARTD0, 0xDC);
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* \endcode
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*
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* @{
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/* Macros: */
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/** \name SPI SCK Polarity Configuration Masks */
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//@{
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/** SPI clock polarity mask for \c SerialSPI_Init(). Indicates that the SCK should lead on the rising edge. */
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/** SPI clock polarity mask for \ref SerialSPI_Init(). Indicates that the SCK should lead on the rising edge. */
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#define USART_SPI_SCK_LEAD_RISING 0
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//@}
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/** \name SPI Sample Edge Configuration Masks */
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//@{
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/** SPI data sample mode mask for \c SerialSPI_Init(). Indicates that the data should sampled on the leading edge. */
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/** SPI data sample mode mask for \ref SerialSPI_Init(). Indicates that the data should sampled on the leading edge. */
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#define USART_SPI_SAMPLE_LEADING 0
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/** SPI data sample mode mask for \c SerialSPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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/** SPI data sample mode mask for \ref SerialSPI_Init(). Indicates that the data should be sampled on the trailing edge. */
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#define USART_SPI_SAMPLE_TRAILING USART_UPCHA_bm
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//@}
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/** \name SPI Data Ordering Configuration Masks */
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//@{
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/** SPI data order mask for \c Serial_SPIInit(). Indicates that data should be shifted out MSB first. */
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/** SPI data order mask for \ref SerialSPI_Init(). Indicates that data should be shifted out MSB first. */
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#define USART_SPI_ORDER_MSB_FIRST 0
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/** SPI data order mask for \c Serial_SPIInit(). Indicates that data should be shifted out LSB first. */
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/** SPI data order mask for \ref SerialSPI_Init(). Indicates that data should be shifted out LSB first. */
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#define USART_SPI_ORDER_LSB_FIRST USART_UDORD_bm
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//@}
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*
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* \code
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* // Initialize the serial USART driver before first use, with 9600 baud (and no double-speed mode)
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* Serial_Init(&USARTD, 9600, false);
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* Serial_Init(&USARTD0, 9600, false);
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*
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* // Send a string through the USART
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* Serial_TxString(&USARTD, "Test String\r\n");
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* Serial_TxString(&USARTD0, "Test String\r\n");
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*
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* // Receive a byte through the USART
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* uint8_t DataByte = Serial_RxByte(&USARTD);
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* uint8_t DataByte = Serial_RxByte(&USARTD0);
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* \endcode
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*
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* @{
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