forked from mfulz_github/qmk_firmware
Complete initial working revision of PDI programming in the AVRISP project (XMEGAs can now be programmed by the firmware).
This commit is contained in:
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79efd8c79e
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2f6c096050
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@ -18,18 +18,20 @@
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* The following is a list of known AVR USB development boards, which recommend using LUFA for the USB stack. Some of these
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* are open design, and all are available for purchase as completed development boards suitable for project development.
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*
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* - Micropendous, an open design/source set of AVR USB development boards: http://micropendous.org/
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* - Benito #7, a no-frills USB board: http://www.dorkbotpdx.org/wiki/benito
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* - Bumble-B, yet another AT90USB162 development board: http://fletchtronics.net/bumble-b
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* - Micropendous, an open design/source set of AVR USB development boards: http://micropendous.org/
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* - Nanduino, a do-it-yourself AT90USB162 board: http://www.makestuff.eu/wordpress/?page_id=569
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* - Teensy and Teensy++, two other AVR USB development boards: http://www.pjrc.com/teensy/index.html
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* - USB10 AKA "The Ferret", a AT90USB162 development board: http://www.soc-machines.com
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* - USBFoo, an AT90USB162 based development board: http://shop.kernelconcepts.de/product_info.php?products_id=102
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* - Teensy and Teensy++, two other AVR USB development boards: http://www.pjrc.com/teensy/index.html
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*
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* \section Sec_LUFAProjects Projects Using LUFA (Hobbyist)
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*
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* The following are known hobbyist projects using LUFA. Most are open source, and show off interesting ways that the LUFA library
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* can be incorporated into many different applications.
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*
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* - Arcade Controller: http://fletchtronics.net/arcade-controller-made-petunia
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* - Bicycle POV: http://www.code.google.com/p/bicycleledpov/
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* - CAMTRIG, a remote Camera Trigger device: http://code.astraw.com/projects/motmot/camtrig
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* - "Fingerlicking Wingdinger" (WARNING: Bad Language if no Javascript), a MIDI controller - http://noisybox.net/electronics/wingdinger/
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@ -96,7 +96,7 @@ bool NVMTarget_WaitWhileNVMControllerBusy(void)
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* \param[in] CRCCommand NVM CRC command to issue to the target
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* \param[out] CRCDest CRC Destination when read from the target
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
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{
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@ -148,7 +148,7 @@ bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest)
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* \param[out] ReadBuffer Buffer to store read data into
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* \param[in] ReadSize Number of bytes to read
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
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{
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@ -156,7 +156,7 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
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if (!(NVMTarget_WaitWhileNVMControllerBusy()))
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return false;
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/* Send the READNVM command to the NVM controller for reading of an aribtrary location */
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/* Send the READNVM command to the NVM controller for reading of an arbitrary location */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(NVM_CMD_READNVM);
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@ -166,9 +166,8 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
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NVMTarget_SendAddress(ReadAddress);
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/* Send the REPEAT command with the specified number of bytes to read */
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);
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PDITarget_SendByte(ReadSize & 0xFF);
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PDITarget_SendByte(ReadSize >> 8);
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
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PDITarget_SendByte(ReadSize - 1);
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/* Send a LD command with indirect access and postincrement to read out the bytes */
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PDITarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
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@ -185,26 +184,23 @@ bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t Re
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* \param[in] WriteBuffer Buffer to source data from
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* \param[in] WriteSize Number of bytes to write
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer)
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{
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for (uint16_t i = 0; i < WriteSize; i++)
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{
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/* Wait until the NVM controller is no longer busy */
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if (!(NVMTarget_WaitWhileNVMControllerBusy()))
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return false;
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/* Wait until the NVM controller is no longer busy */
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if (!(NVMTarget_WaitWhileNVMControllerBusy()))
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return false;
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/* Send the memory write command to the target */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(WriteCommand);
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/* Send the memory write command to the target */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(WriteCommand);
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/* Send each new memory byte to the memory to the target */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendAddress(WriteAddress++);
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PDITarget_SendByte(*(WriteBuffer++));
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}
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/* Send new memory byte to the memory to the target */
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PDITarget_SendByte(PDI_CMD_STS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendAddress(WriteAddress++);
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PDITarget_SendByte(*(WriteBuffer++));
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return true;
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}
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@ -219,7 +215,7 @@ bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint
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* \param[in] WriteBuffer Buffer to source data from
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* \param[in] WriteSize Number of bytes to write
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,
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uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize)
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NVMTarget_SendAddress(WriteAddress);
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/* Send the REPEAT command with the specified number of bytes to write */
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_2BYTES);
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PDITarget_SendByte(WriteSize & 0xFF);
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PDITarget_SendByte(WriteSize >> 8);
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PDITarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
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PDITarget_SendByte(WriteSize - 1);
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/* Send a ST command with indirect access and postincrement to write the bytes */
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PDITarget_SendByte(PDI_CMD_ST | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
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for (uint16_t i = 0; i < WriteSize; i++)
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PDITarget_SendByte(*(WriteBuffer++));
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// TEMP
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PDITarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
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NVMTarget_SendNVMRegAddress(NVM_REG_STATUS);
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GPIOR0 = PDITarget_ReceiveByte();
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if (!(GPIOR0 & (1 << 0)))
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JTAG_DEBUG_POINT();
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// END TEMP
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}
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if (PageMode & XPRG_PAGEMODE_WRITE)
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@ -300,7 +287,7 @@ bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffComman
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* \param[in] EraseCommand NVM erase command to send to the device
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* \param[in] Address Address inside the memory space to erase
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*
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* \return Boolean true if the command sequence complete sucessfully
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* \return Boolean true if the command sequence complete successfully
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*/
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bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
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{
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@ -313,7 +300,7 @@ bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address)
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NVMTarget_SendNVMRegAddress(NVM_REG_CMD);
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PDITarget_SendByte(EraseCommand);
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/* Chip erase is handled seperately, since it's procedure is different to other erase types */
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/* Chip erase is handled separately, since it's procedure is different to other erase types */
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if (EraseCommand == NVM_CMD_CHIPERASE)
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{
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/* Set CMDEX bit in NVM CTRLA register to start the chip erase */
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@ -77,7 +77,7 @@
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#define NVM_CMD_LOADFLASHPAGEBUFF 0x23
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#define NVM_CMD_ERASEFLASHPAGEBUFF 0x26
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#define NVM_CMD_ERASEFLASHPAGE 0x2B
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#define NVM_CMD_FLASHPAGEWRITE 0x2E
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#define NVM_CMD_WRITEFLASHPAGE 0x2E
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#define NVM_CMD_ERASEWRITEFLASH 0x2F
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#define NVM_CMD_FLASHCRC 0x78
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#define NVM_CMD_ERASEAPPSEC 0x20
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@ -111,8 +111,7 @@
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bool NVMTarget_WaitWhileNVMControllerBusy(void);
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bool NVMTarget_GetMemoryCRC(uint8_t CRCCommand, uint32_t* CRCDest);
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bool NVMTarget_ReadMemory(uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize);
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer,
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uint16_t WriteSize);
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bool NVMTarget_WriteByteMemory(uint8_t WriteCommand, uint32_t WriteAddress, uint8_t* WriteBuffer);
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bool NVMTarget_WritePageMemory(uint8_t WriteBuffCommand, uint8_t EraseBuffCommand, uint8_t WritePageCommand,
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uint8_t PageMode, uint32_t WriteAddress, uint8_t* WriteBuffer, uint16_t WriteSize);
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bool NVMTarget_EraseMemory(uint8_t EraseCommand, uint32_t Address);
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@ -37,8 +37,6 @@
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#include "PDIProtocol.h"
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#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
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#warning PDI Programming Protocol support is incomplete and not currently suitable for general use.
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/** Base absolute address for the target's NVM controller */
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uint32_t XPROG_Param_NVMBase;
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@ -164,6 +162,7 @@ static void PDIProtocol_Erase(void)
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uint8_t EraseCommand = NVM_CMD_NOOP;
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/* Determine which NVM command to send to the device depending on the memory to erase */
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if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_CHIP)
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EraseCommand = NVM_CMD_CHIPERASE;
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else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_APP)
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@ -181,6 +180,7 @@ static void PDIProtocol_Erase(void)
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else if (Erase_XPROG_Params.MemoryType == XPRG_ERASE_USERSIG)
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EraseCommand = NVM_CMD_ERASEUSERSIG;
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/* Erase the target memory, indicate timeout if ocurred */
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if (!(NVMTarget_EraseMemory(EraseCommand, Erase_XPROG_Params.Address)))
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ReturnStatus = XPRG_ERR_TIMEOUT;
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@ -213,65 +213,51 @@ static void PDIProtocol_WriteMemory(void)
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Endpoint_ClearOUT();
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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uint8_t WriteCommand = NVM_CMD_NOOP;
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uint8_t WriteBuffCommand = NVM_CMD_NOOP;
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uint8_t EraseBuffCommand = NVM_CMD_NOOP;
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bool PagedMemory = false;
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/* Assume FLASH page programming by default, as it is the common case */
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uint8_t WriteCommand = NVM_CMD_WRITEFLASHPAGE;
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uint8_t WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;
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uint8_t EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;
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bool PagedMemory = true;
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if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_APPL)
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{
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WriteCommand = NVM_CMD_ERASEWRITEFLASH;
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WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;
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EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;
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PagedMemory = true;
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WriteCommand = NVM_CMD_WRITEAPPSECPAGE;
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}
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else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_BOOT)
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{
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WriteCommand = NVM_CMD_ERASEWRITEFLASH;
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WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;
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EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;
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PagedMemory = true;
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WriteCommand = NVM_CMD_WRITEBOOTSECPAGE;
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}
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else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_EEPROM)
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{
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WriteCommand = NVM_CMD_ERASEWRITEEEPROMPAGE;
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WriteCommand = NVM_CMD_WRITEEEPROMPAGE;
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WriteBuffCommand = NVM_CMD_LOADEEPROMPAGEBUFF;
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EraseBuffCommand = NVM_CMD_ERASEEEPROMPAGEBUFF;
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PagedMemory = true;
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}
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else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_USERSIG)
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{
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/* User signature is paged, but needs us to manually indicate the mode bits since the host doesn't set them */
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WriteMemory_XPROG_Params.PageMode = (XPRG_PAGEMODE_ERASE | XPRG_PAGEMODE_WRITE);
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WriteCommand = NVM_CMD_WRITEUSERSIG;
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WriteBuffCommand = NVM_CMD_LOADFLASHPAGEBUFF;
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EraseBuffCommand = NVM_CMD_ERASEFLASHPAGEBUFF;
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PagedMemory = true;
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}
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else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_FUSE)
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{
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WriteCommand = NVM_CMD_WRITEFUSE;
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WriteCommand = NVM_CMD_WRITEFUSE;
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PagedMemory = false;
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}
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else if (WriteMemory_XPROG_Params.MemoryType == XPRG_MEM_TYPE_LOCKBITS)
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{
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WriteCommand = NVM_CMD_WRITELOCK;
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WriteCommand = NVM_CMD_WRITELOCK;
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PagedMemory = false;
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}
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if (PagedMemory)
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/* Send the appropriate memory write commands to the device, indicate timeout if occurred */
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if ((PagedMemory && !NVMTarget_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand,
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WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,
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WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)) ||
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(!PagedMemory && !NVMTarget_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address,
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WriteMemory_XPROG_Params.ProgData)))
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{
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if (!(NVMTarget_WritePageMemory(WriteBuffCommand, EraseBuffCommand, WriteCommand,
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WriteMemory_XPROG_Params.PageMode, WriteMemory_XPROG_Params.Address,
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WriteMemory_XPROG_Params.ProgData, WriteMemory_XPROG_Params.Length)))
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{
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ReturnStatus = XPRG_ERR_TIMEOUT;
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}
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}
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else
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{
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if (!(NVMTarget_WriteByteMemory(WriteCommand, WriteMemory_XPROG_Params.Address, WriteMemory_XPROG_Params.ProgData,
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WriteMemory_XPROG_Params.Length)))
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{
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ReturnStatus = XPRG_ERR_TIMEOUT;
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}
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ReturnStatus = XPRG_ERR_TIMEOUT;
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}
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Endpoint_Write_Byte(CMD_XPROG);
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@ -301,8 +287,9 @@ static void PDIProtocol_ReadMemory(void)
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Endpoint_ClearOUT();
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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uint8_t ReadBuffer[ReadMemory_XPROG_Params.Length];
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uint8_t ReadBuffer[256];
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/* Read the target's memory, indicate timeout if occurred */
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if (!(NVMTarget_ReadMemory(ReadMemory_XPROG_Params.Address, ReadBuffer, ReadMemory_XPROG_Params.Length)))
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ReturnStatus = XPRG_ERR_TIMEOUT;
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@ -335,6 +322,7 @@ static void PDIProtocol_ReadCRC(void)
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uint8_t CRCCommand = NVM_CMD_NOOP;
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uint32_t MemoryCRC;
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/* Determine which NVM command to send to the device depending on the memory to CRC */
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if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_APP)
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CRCCommand = NVM_CMD_APPCRC;
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else if (ReadCRC_XPROG_Params.CRCType == XPRG_CRC_BOOT)
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@ -342,6 +330,7 @@ static void PDIProtocol_ReadCRC(void)
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else
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CRCCommand = NVM_CMD_FLASHCRC;
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/* Perform and retrieve the memory CRC, indicate timeout if occurred */
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if (!(NVMTarget_GetMemoryCRC(CRCCommand, &MemoryCRC)))
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ReturnStatus = XPRG_ERR_TIMEOUT;
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@ -367,6 +356,7 @@ static void PDIProtocol_SetParam(void)
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uint8_t XPROGParam = Endpoint_Read_Byte();
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/* Determine which parameter is being set, store the new parameter value */
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if (XPROGParam == XPRG_PARAM_NVMBASE)
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XPROG_Param_NVMBase = Endpoint_Read_DWord_BE();
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else if (XPROGParam == XPRG_PARAM_EEPPAGESIZE)
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@ -98,8 +98,8 @@
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#define XPRG_PROTOCOL_PDI 0x00
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#define XPRG_PROTOCOL_JTAG 0x01
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#define XPRG_PAGEMODE_WRITE (1 << 0)
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#define XPRG_PAGEMODE_ERASE (1 << 1)
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#define XPRG_PAGEMODE_WRITE (1 << 1)
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#define XPRG_PAGEMODE_ERASE (1 << 0)
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/* External Variables: */
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extern uint32_t XPROG_Param_NVMBase;
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