forked from mfulz_github/qmk_firmware
Add glitch protection to the software UART in the XPLAINBridge project code, so that very short glitches on the RX line don't cause a frame reception to occur.
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229935184b
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3fd246041b
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@ -76,15 +76,21 @@ void SoftUART_Init(void)
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/** ISR to detect the start of a bit being sent to the software UART. */
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ISR(INT0_vect, ISR_BLOCK)
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{
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/* Reset and start the reception timer */
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TCNT1 = 0;
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TCCR1B = ((1 << CS10) | (1 << WGM12));
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/* Reset the number of reception bits remaining counter */
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RX_BitsRemaining = 8;
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/* Reset the bit reception timer */
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TCNT1 = 0;
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/* Disable start bit detection ISR while the next byte is received */
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EIMSK = 0;
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/* Check to see that the pin is still low (prevents glitches from starting a frame reception) */
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if (!(SRXPIN & (1 << SRX)))
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{
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/* Disable start bit detection ISR while the next byte is received */
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EIMSK = 0;
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/* Start the reception timer */
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TCCR1B = ((1 << CS10) | (1 << WGM12));
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}
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}
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/** ISR to manage the reception of bits to the software UART. */
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@ -133,7 +139,7 @@ ISR(TIMER3_COMPA_vect, ISR_NOBLOCK)
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TX_Data >>= 1;
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TX_BitsRemaining--;
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}
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else if (USBtoUART_Buffer.Count)
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else if (USBtoUART_Buffer.Count && !(RX_BitsRemaining))
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{
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/* Start bit - TX line low */
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STXPORT &= ~(1 << STX);
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@ -180,7 +180,7 @@ void EVENT_USB_Device_ConfigurationChanged(void)
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{
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EndpointConfigSuccess &= CDC_Device_ConfigureEndpoints(&VirtualSerial_CDC_Interface);
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/* Configure the UART flush timer */
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/* Configure the UART flush timer - run at FCPU/1024 for maximum interval before overflow */
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TCCR0B = ((1 << CS02) | (1 << CS00));
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}
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else
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