Make XPLAINBridge serial bridge much more reliable for the reception of characters from the XMEGA through the software UART interface.

This commit is contained in:
Dean Camera 2010-06-24 08:12:27 +00:00
parent ad29e79b94
commit 55d7e1e65b

View File

@ -79,18 +79,12 @@ ISR(INT0_vect, ISR_BLOCK)
RX_Data = 0; RX_Data = 0;
RX_BitMask = (1 << 0); RX_BitMask = (1 << 0);
/* Check that the start bit is still low to prevent noise from triggering a reception */ /* Clear reception channel ISR flag and enable the bit reception ISR */
if (!(SRXPIN & (1 << SRX))) TIFR1 = (1 << OCF1A);
{ TIMSK1 = (1 << OCIE1A);
/* Clear reception channel ISR flag in case it is pending */
TIFR1 = (1 << OCF1A);
/* Still low, enable bit receive ISR */ /* Disable start bit detection ISR while the next byte is received */
TIMSK1 = (1 << OCIE1A); EIMSK &= ~(1 << INT0);
/* Clear the start bit detection ISR flag */
EIMSK &= ~(1 << INT0);
}
} }
/** ISR to manage the reception of bits to the software UART. */ /** ISR to manage the reception of bits to the software UART. */