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Fix TPI communications in the AVRISP project when bit-banged USART mode is selected.

This commit is contained in:
Dean Camera 2010-01-29 05:31:25 +00:00
parent fa3135d485
commit 872f61ff53
3 changed files with 9 additions and 9 deletions
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4
Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.c
View File

@ -116,7 +116,7 @@ bool TINYNVM_WaitWhileNVMControllerBusy(void)
*
* \return Boolean true if the command sequence complete successfully
*/
bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadSize)
{
/* Wait until the NVM controller is no longer busy */
if (!(TINYNVM_WaitWhileNVMControllerBusy()))
@ -147,7 +147,7 @@ bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_
*
* \return Boolean true if the command sequence complete successfully
*/
bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength)
bool TINYNVM_WriteMemory(const uint16_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength)
{
/* Wait until the NVM controller is no longer busy */
if (!(TINYNVM_WaitWhileNVMControllerBusy()))

4
Projects/AVRISP-MKII/Lib/XPROG/TINYNVM.h
View File

@ -63,8 +63,8 @@
/* Function Prototypes: */
bool TINYNVM_WaitWhileNVMBusBusy(void);
bool TINYNVM_ReadMemory(const uint32_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadLength);
bool TINYNVM_WriteMemory(const uint32_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength);
bool TINYNVM_ReadMemory(const uint16_t ReadAddress, uint8_t* ReadBuffer, uint16_t ReadLength);
bool TINYNVM_WriteMemory(const uint16_t WriteAddress, const uint8_t* WriteBuffer, uint16_t WriteLength);
bool TINYNVM_EraseMemory(void);
#if defined(INCLUDE_FROM_TINYNVM_C)

10
Projects/AVRISP-MKII/Lib/XPROG/XPROGTarget.c
View File

@ -96,7 +96,7 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
}
/** ISR to manage the TPI software USART when bit-banged TPI USART mode is selected. */
ISR(TIMER1_COMPB_vect, ISR_BLOCK)
ISR(TIMER1_CAPT_vect, ISR_BLOCK)
{
/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
@ -209,10 +209,10 @@ void XPROGTarget_EnableTargetTPI(void)
/* Set DATA line high for idle state */
BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
/* Fire timer capture channel B ISR to manage the software USART */
OCR1B = BITS_BETWEEN_USART_CLOCKS;
TCCR1B = (1 << WGM12) | (1 << CS10);
TIMSK1 = (1 << OCIE1B);
/* Fire timer capture channel ISR to manage the software USART */
ICR1 = BITS_BETWEEN_USART_CLOCKS;
TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
TIMSK1 = (1 << ICIE1);
#endif
/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */