forked from mfulz_github/qmk_firmware
Fixed AVRISP PDI race condition where the guard time between direction changes could be interpreted as a start bit. Fixed TPI interface lines not being changed correctly when in bit-banged TPI mode.
This commit is contained in:
Dean Camera
parent
e1c1c25619
commit
b1dbd92c32
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@ -16,9 +16,12 @@
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* <b>Changed:</b>
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* - Slowed down bit-banged PDI programming in the AVRISP project slightly to prevent transmission errors
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* - Renamed the AVRISP project folder to AVRISP-MKII to reduce confusion
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* - Renamed the RESET_LINE_* makefile tokens in the AVRISP MKII Project to AUX_LINE_*, as they are not always used for target
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* reset
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*
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* <b>Fixed:</b>
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* - Fixed AVRISP project not able to enter programming mode when ISP protocol is used
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* - Fixed AVRISP PDI race condition where the guard time between direction changes could be interpreted as a start bit
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*
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* \section Sec_ChangeLog091223 Version 091223
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*
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@ -33,7 +33,7 @@
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* Header file for XMEGANVM.c.
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*/
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#ifndef _XMEGA_NVM__
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#ifndef _XMEGA_NVM_
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#define _XMEGA_NVM_
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/* Includes: */
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@ -113,6 +113,7 @@
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extern uint16_t XPROG_Param_EEPageSize;
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extern uint8_t XPROG_Param_NVMCSRRegAddr;
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extern uint8_t XPROG_Param_NVMCMDRegAddr;
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extern uint8_t XPROG_SelectedProtocol;
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/* Function Prototypes: */
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void XPROGProtocol_SetMode(void);
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@ -279,33 +279,16 @@ void XPROGTarget_DisableTargetTPI(void)
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*/
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void XPROGTarget_SendByte(const uint8_t Byte)
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{
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Switch to Tx mode if currently in Rx mode */
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if (!(IsSending))
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{
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PORTD |= (1 << 3);
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DDRD |= (1 << 3);
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UCSR1B |= (1 << TXEN1);
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UCSR1B &= ~(1 << RXEN1);
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IsSending = true;
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}
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XPROGTarget_SetTxMode();
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Wait until there is space in the hardware Tx buffer before writing */
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while (!(UCSR1A & (1 << UDRE1)));
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UCSR1A |= (1 << TXC1);
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UDR1 = Byte;
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#else
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/* Switch to Tx mode if currently in Rx mode */
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if (!(IsSending))
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{
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BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
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BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;
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IsSending = true;
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}
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/* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
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uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
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@ -332,37 +315,15 @@ void XPROGTarget_SendByte(const uint8_t Byte)
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*/
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uint8_t XPROGTarget_ReceiveByte(void)
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{
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Switch to Rx mode if currently in Tx mode */
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if (IsSending)
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{
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while (!(UCSR1A & (1 << TXC1)));
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UCSR1A |= (1 << TXC1);
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UCSR1B &= ~(1 << TXEN1);
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UCSR1B |= (1 << RXEN1);
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DDRD &= ~(1 << 3);
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PORTD &= ~(1 << 3);
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IsSending = false;
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}
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XPROGTarget_SetRxMode();
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Wait until a byte has been received before reading */
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while (!(UCSR1A & (1 << RXC1)) && TimeoutMSRemaining);
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return UDR1;
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#else
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/* Switch to Rx mode if currently in Tx mode */
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if (IsSending)
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{
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while (SoftUSART_BitCount);
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BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;
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BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
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IsSending = false;
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}
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/* Wait until a byte has been received before reading */
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SoftUSART_BitCount = BITS_IN_USART_FRAME;
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while (SoftUSART_BitCount && TimeoutMSRemaining);
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@ -375,19 +336,11 @@ uint8_t XPROGTarget_ReceiveByte(void)
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/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
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void XPROGTarget_SendBreak(void)
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{
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Switch to Tx mode if currently in Rx mode */
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if (!(IsSending))
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{
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PORTD |= (1 << 3);
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DDRD |= (1 << 3);
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UCSR1B &= ~(1 << RXEN1);
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UCSR1B |= (1 << TXEN1);
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IsSending = true;
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}
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XPROGTarget_SetTxMode();
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Need to do nothing for a full frame to send a BREAK */
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for (uint8_t i = 0; i < BITS_IN_USART_FRAME; i++)
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{
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@ -396,15 +349,6 @@ void XPROGTarget_SendBreak(void)
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while (!(PIND & (1 << 5)));
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}
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#else
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/* Switch to Tx mode if currently in Rx mode */
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if (!(IsSending))
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{
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BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
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BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;
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IsSending = true;
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}
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while (SoftUSART_BitCount);
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/* Need to do nothing for a full frame to send a BREAK */
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@ -413,4 +357,73 @@ void XPROGTarget_SendBreak(void)
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#endif
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}
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static void XPROGTarget_SetTxMode(void)
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{
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#if defined(XPROG_VIA_HARDWARE_USART)
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/* Wait for a full cycle of the clock */
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while (PIND & (1 << 5));
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while (!(PIND & (1 << 5)));
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PORTD |= (1 << 3);
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DDRD |= (1 << 3);
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UCSR1B &= ~(1 << RXEN1);
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UCSR1B |= (1 << TXEN1);
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IsSending = true;
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#else
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while (SoftUSART_BitCount);
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/* Wait for a full cycle of the clock */
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SoftUSART_Data = 0x0001;
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SoftUSART_BitCount = 1;
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while (SoftUSART_BitCount);
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if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
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{
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BITBANG_PDIDATA_PORT |= BITBANG_PDIDATA_MASK;
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BITBANG_PDIDATA_DDR |= BITBANG_PDIDATA_MASK;
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}
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else
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{
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BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
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BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
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}
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#endif
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IsSending = true;
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}
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static void XPROGTarget_SetRxMode(void)
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{
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#if defined(XPROG_VIA_HARDWARE_USART)
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while (!(UCSR1A & (1 << TXC1)));
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UCSR1A |= (1 << TXC1);
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UCSR1B &= ~(1 << TXEN1);
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UCSR1B |= (1 << RXEN1);
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DDRD &= ~(1 << 3);
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PORTD &= ~(1 << 3);
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#else
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while (SoftUSART_BitCount);
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if (XPROG_SelectedProtocol == XPRG_PROTOCOL_PDI)
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{
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BITBANG_PDIDATA_DDR &= ~BITBANG_PDIDATA_MASK;
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BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
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}
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else
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{
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BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;
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BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
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}
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/* Wait until DATA line has been pulled up to idle by the target */
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while (!(BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK));
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#endif
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IsSending = false;
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}
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#endif
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@ -44,6 +44,7 @@
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#include <LUFA/Common/Common.h>
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#include "../V2Protocol.h"
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#include "XPROGProtocol.h"
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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@ -141,5 +142,10 @@
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uint8_t XPROGTarget_ReceiveByte(void);
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void XPROGTarget_SendBreak(void);
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bool XPROGTarget_WaitWhileNVMBusBusy(void);
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#if defined(INCLUDE_FROM_XPROGTARGET_C)
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static void XPROGTarget_SetTxMode(void);
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static void XPROGTarget_SetRxMode(void);
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#endif
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#endif
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