forked from mfulz_github/qmk_firmware
Add support for triple endpoint/pipe bank AVR32 UC3 devices.
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@ -117,7 +117,7 @@
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#define ENDPOINT_DETAILS_EP3 512, 2
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#define ENDPOINT_DETAILS_EP3 512, 2
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#define ENDPOINT_DETAILS_EP4 512, 2
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#define ENDPOINT_DETAILS_EP4 512, 2
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#define ENDPOINT_DETAILS_EP5 512, 2
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#define ENDPOINT_DETAILS_EP5 512, 2
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#define ENDPOINT_DETAILS_EP6 512, 2
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#define ENDPOINT_DETAILS_EP6 512, 2
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#define ENDPOINT_DETAILS_EP7 512, 2
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#define ENDPOINT_DETAILS_EP7 512, 2
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#elif defined(USB_SERIES_UC3B0_AVR32) || defined(USB_SERIES_UC3B1_AVR32)
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#elif defined(USB_SERIES_UC3B0_AVR32) || defined(USB_SERIES_UC3B1_AVR32)
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#define ENDPOINT_DETAILS_MAXEP 7
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#define ENDPOINT_DETAILS_MAXEP 7
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@ -190,6 +190,17 @@
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* accesses the second bank.
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* accesses the second bank.
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*/
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*/
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#define ENDPOINT_BANK_DOUBLE AVR32_USBB_UECFG0_EPBK_DOUBLE
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#define ENDPOINT_BANK_DOUBLE AVR32_USBB_UECFG0_EPBK_DOUBLE
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#if defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32) || defined(__DOXYGEN__)
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/** Mask for the bank mode selection for the \ref Endpoint_ConfigureEndpoint() macro. This indicates
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* that the endpoint should have three banks, which requires more USB FIFO memory but results
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* in faster transfers as one USB device (the AVR or the host) can access one bank while the other
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* accesses the remaining banks.
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*
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* \note Not available on all AVR models.
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*/
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#define ENDPOINT_BANK_TRIPLE AVR32_USBB_UECFG0_EPBK_TRIPLE
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#endif
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//@}
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//@}
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#if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__))
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#if (!defined(FIXED_CONTROL_ENDPOINT_SIZE) || defined(__DOXYGEN__))
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@ -161,6 +161,17 @@
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* bank.
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* bank.
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*/
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*/
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#define PIPE_BANK_DOUBLE AVR32_USBB_UPCFG0_PBK_DOUBLE
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#define PIPE_BANK_DOUBLE AVR32_USBB_UPCFG0_PBK_DOUBLE
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#if defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32) || defined(__DOXYGEN__)
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/** Mask for the bank mode selection for the \ref Pipe_ConfigurePipe() macro. This indicates that the
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* pipe should have three banks, which requires more USB FIFO memory but results in faster transfers
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* as one USB device (the AVR or the attached device) can access one bank while the other accesses the
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* remaining banks.
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*
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* \note Not available on all AVR models.
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*/
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#define PIPE_BANK_TRIPLE AVR32_USBB_UPCFG0_PBK_TRIPLE
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#endif
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//@}
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//@}
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/** Default size of the default control pipe's bank, until altered by the Endpoint0Size value
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/** Default size of the default control pipe's bank, until altered by the Endpoint0Size value
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@ -298,7 +298,7 @@
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/* Private Interface - For use in library only: */
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/* Private Interface - For use in library only: */
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#if !defined(__DOXYGEN__)
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#if !defined(__DOXYGEN__)
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/* Macros: */
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/* Macros: */
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#if (defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32))
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#if defined(USB_SERIES_UC3A3_AVR32) || defined(USB_SERIES_UC3A4_AVR32)
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#define USB_CLOCK_REQUIRED_FREQ 12000000UL
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#define USB_CLOCK_REQUIRED_FREQ 12000000UL
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#else
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#else
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#define USB_CLOCK_REQUIRED_FREQ 48000000UL
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#define USB_CLOCK_REQUIRED_FREQ 48000000UL
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