forked from mfulz_github/qmk_firmware
Start of implementation of the low level TPI programming protocol in the AVRISP project.
This commit is contained in:
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@ -9,6 +9,15 @@
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* \section Sec_ChangeLogXXXXXX Version XXXXXX
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*
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* <b>New:</b>
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* - Added TPI programming support for 6-pin ATTINY to the AVRISP programmer project
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*
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* <b>Changed:</b>
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*
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* <b>Fixed:</b>
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*
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* \section Sec_ChangeLog091223 Version 091223
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*
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* <b>New:</b>
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* - Added activity LED indicators to the AVRISP project to indicate when the device is busy processing a command
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* - The USB target family and allowable USB mode tokens are now public and documented (USB_CAN_BE_*, USB_SERIES_*_AVR)
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* - Added new XPLAIN USB to Serial Bridge project (thanks to John Steggall for initial proof-of-concept, David Prentice
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@ -34,7 +34,7 @@
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* - Arcade Controller: http://fletchtronics.net/arcade-controller-made-petunia
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* - Bicycle POV: http://www.code.google.com/p/bicycleledpov/
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* - CAMTRIG, a remote Camera Trigger device: http://code.astraw.com/projects/motmot/camtrig
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* - "Fingerlicking Wingdinger" (WARNING: Bad Language if no Javascript), a MIDI controller - http://noisybox.net/electronics/wingdinger/
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* - "Fingerlicking Wingdinger" (WARNING: Bad Language if no Javascript), a MIDI controller: http://noisybox.net/electronics/wingdinger/
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* - Garmin GPS USB to NMEA standard serial sentence translator: http://github.com/nall/garmin-transmogrifier/tree/master
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* - Generic HID Device Creator : http://generichid.sourceforge.net/
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* - Mobo 4.3, some sort of Audio related device: http://sites.google.com/site/lofturj/mobo4_3
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@ -10,7 +10,11 @@
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* to the next version released. It does not indicate all new additions to the library in each version change, only
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* areas relevant to making older projects compatible with the API changes of each new release.
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*
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* \section Sec_MigrationXXXXXX Migrating from 091122 to XXXXXX
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* \section Sec_MigrationXXXXXX Migrating from 091223 to XXXXXX
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*
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* <i>There is no migration information for this release.</i>
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*
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* \section Sec_Migration091223 Migrating from 091122 to 091223
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*
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* <b>Host Mode</b>
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* - The Still Image Host Class driver SI_Host_USBTask() and SI_Host_ConfigurePipes() functions were misnamed, and are
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@ -62,10 +62,10 @@
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* without an ADC converter, VTARGET will report at a fixed 5V level.
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*
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* When compiled for the XPLAIN board target, this will automatically configure itself for the correct connections to the
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* XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP mode is not needed).
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* XPLAIN's XMEGA AVR, and will enable PDI only programming support (since ISP and TPI modes are not needed).
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*
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* While this application can be compiled for USB AVRs with as little as 8KB of FLASH, for full functionality 16KB or more
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* of FLASH is required. On 8KB devices, either ISP or PDI programming support can be disabled to reduce program size.
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* of FLASH is required. On 8KB devices, ISP, PDI or TPI programming support can be disabled to reduce program size.
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*
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* \section Sec_ISP ISP Connections
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* Connections to the device for SPI programming (when enabled):
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@ -155,6 +155,50 @@
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* <b><sup>1</sup></b> <i>When PDI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together
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* via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>
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*
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* \section Sec_TPI TPI Connections
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* Connections to the device for TPI programming<b><sup>1</sup></b> (when enabled):
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*
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* <table>
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* <tr>
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* <td><b>Programmer Pin:</b></td>
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* <td><b>Target Device Pin:</b></td>
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* <td><b>PDI 6 Pin Layout:</b></td>
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* </tr>
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* <tr>
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* <td>MISO</td>
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* <td>DATA</td>
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* <td>1</td>
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* </tr>
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* <tr>
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* <td>ADCx <b><sup>1</sup></b></td>
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* <td>VTARGET</td>
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* <td>2</td>
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* </tr>
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* <tr>
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* <td>SCLK</td>
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* <td>CLOCK</td>
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* <td>3</td>
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* </tr>
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* <tr>
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* <td>N/A</td>
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* <td>N/A</td>
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* <td>4</td>
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* </tr>
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* <tr>
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* <td>PORTx.y <b><sup>2</sup></b></td>
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* <td>/RESET</td>
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* <td>5</td>
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* </tr>
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* <tr>
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* <td>GND</td>
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* <td>GND</td>
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* <td>6</td>
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* </tr>
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* </table>
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*
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* <b><sup>1</sup></b> <i>When TPI_VIA_HARDWARE_USART is set, the AVR's Tx and Rx become the DATA line when connected together
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* via a pair of 300 ohm resistors, and the AVR's XCK pin becomes CLOCK.</i>
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*
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* \section SSec_Options Project Options
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*
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* The following defines can be found in this project, which can control the project behaviour when defined, or changed in value.
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@ -204,6 +248,11 @@
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* <td>Define to enable XMEGA PDI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>
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* </tr>
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* <tr>
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* <td>ENABLE_TPI_PROTOCOL</td>
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* <td>Makefile CDEFS</td>
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* <td>Define to enable 6-PIN ATTINY TPI programming protocol support. <i>Ignored when compiled for the XPLAIN board.</i></td>
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* </tr>
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* <tr>
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* <td>PDI_VIA_HARDWARE_USART</td>
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* <td>Makefile CDEFS</td>
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* <td>Define to force the PDI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to
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@ -211,5 +260,13 @@
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* seperate ISP and PDI programming headers) but increases programming speed dramatically.
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* <i>Ignored when compiled for the XPLAIN board.</i></td>
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* </tr>
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* <tr>
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* <td>TPI_VIA_HARDWARE_USART</td>
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* <td>Makefile CDEFS</td>
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* <td>Define to force the TPI protocol (when enabled) to use the much faster hardware USART instead of bit-banging to
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* match the official AVRISP pinout. This breaks pinout compatibility with the official AVRISP MKII (and requires
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* seperate ISP and TPI programming headers) but increases programming speed dramatically.
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* <i>Ignored when compiled for the XPLAIN board.</i></td>
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* </tr>
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* </table>
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*/
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#undef ENABLE_ISP_PROTOCOL
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#undef ENABLE_TPI_PROTOCOL
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#if !defined(ENABLE_PDI_PROTOCOL)
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#define ENABLE_PDI_PROTOCOL
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#undef ENABLE_ISP_PROTOCOL
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#undef ENABLE_TPI_PROTOCOL
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#if !defined(ENABLE_PDI_PROTOCOL)
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#define ENABLE_PDI_PROTOCOL
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#include "V2Protocol.h"
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#include "PDITarget.h"
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#include "NVMTarget.h"
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#include "XMEGANVM.h"
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#undef ENABLE_ISP_PROTOCOL
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#undef ENABLE_TPI_PROTOCOL
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#if !defined(ENABLE_PDI_PROTOCOL)
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#define ENABLE_PDI_PROTOCOL
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@ -67,13 +67,13 @@ ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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return;
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/* Wait for the start bit when receiving */
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if ((SoftUSART_BitCount == BITS_IN_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
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if ((SoftUSART_BitCount == BITS_IN_PDI_FRAME) && (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK))
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return;
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/* Shift in the bit one less than the frame size in position, so that the start bit will eventually
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* be discarded leaving the data to be byte-aligned for quick access */
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if (BITBANG_PDIDATA_PIN & BITBANG_PDIDATA_MASK)
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SoftUSART_Data |= (1 << (BITS_IN_FRAME - 1));
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SoftUSART_Data |= (1 << (BITS_IN_PDI_FRAME - 1));
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SoftUSART_Data >>= 1;
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SoftUSART_BitCount--;
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TCCR1B = (1 << WGM12) | (1 << CS10);
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TIMSK1 = (1 << OCIE1A);
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/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
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PDITarget_SendBreak();
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PDITarget_SendBreak();
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#endif
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/* Tristate DATA and CLOCK lines */
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BITBANG_PDIDATA_PORT &= ~BITBANG_PDIDATA_MASK;
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BITBANG_PDICLOCK_PORT &= ~BITBANG_PDICLOCK_MASK;
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TCCR0B = 0;
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#endif
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}
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/* Data shifted out LSB first, START DATA PARITY STOP STOP */
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SoftUSART_Data = NewUSARTData;
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SoftUSART_BitCount = BITS_IN_FRAME;
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SoftUSART_BitCount = BITS_IN_PDI_FRAME;
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#endif
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}
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}
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/* Wait until a byte has been received before reading */
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SoftUSART_BitCount = BITS_IN_FRAME;
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SoftUSART_BitCount = BITS_IN_PDI_FRAME;
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while (SoftUSART_BitCount);
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/* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
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}
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/* Need to do nothing for a full frame to send a BREAK */
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for (uint8_t i = 0; i < BITS_IN_FRAME; i++)
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for (uint8_t i = 0; i < BITS_IN_PDI_FRAME; i++)
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{
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/* Wait for a full cycle of the clock */
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while (PIND & (1 << 5));
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/* Need to do nothing for a full frame to send a BREAK */
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SoftUSART_Data = 0x0FFF;
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SoftUSART_BitCount = BITS_IN_FRAME;
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SoftUSART_BitCount = BITS_IN_PDI_FRAME;
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#endif
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}
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/* Preprocessor Checks: */
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#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
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#undef ENABLE_ISP_PROTOCOL
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#undef ENABLE_TPI_PROTOCOL
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#if !defined(ENABLE_PDI_PROTOCOL)
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#define ENABLE_PDI_PROTOCOL
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#define BITBANG_PDICLOCK_MASK RESET_LINE_MASK
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#endif
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#define BITS_IN_FRAME 12
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#define BITS_IN_PDI_FRAME 12
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#define PDI_NVM_TIMEOUT_MS 200
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/*
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LUFA Library
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Copyright (C) Dean Camera, 2009.
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dean [at] fourwalledcubicle [dot] com
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www.fourwalledcubicle.com
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*/
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/*
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Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
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Permission to use, copy, modify, and distribute this software
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and its documentation for any purpose and without fee is hereby
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granted, provided that the above copyright notice appear in all
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copies and that both that the copyright notice and this
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permission notice and warranty disclaimer appear in supporting
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documentation, and that the name of the author not be used in
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advertising or publicity pertaining to distribution of the
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software without specific, written prior permission.
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The author disclaim all warranties with regard to this
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software, including all implied warranties of merchantability
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and fitness. In no event shall the author be liable for any
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special, indirect or consequential damages or any damages
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whatsoever resulting from loss of use, data or profits, whether
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in an action of contract, negligence or other tortious action,
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arising out of or in connection with the use or performance of
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this software.
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*/
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/** \file
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*
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* Target-related functions for the TPI Protocol decoder.
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*/
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#define INCLUDE_FROM_TPITARGET_C
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#include "TPITarget.h"
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#if defined(ENABLE_TPI_PROTOCOL) || defined(__DOXYGEN__)
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/** Flag to indicate if the USART is currently in Tx or Rx mode. */
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volatile bool IsSending;
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#if !defined(TPI_VIA_HARDWARE_USART)
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/** Software USART raw frame bits for transmission/reception. */
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volatile uint16_t SoftUSART_Data;
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/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
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#define SoftUSART_BitCount GPIOR2
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/** ISR to manage the software USART when bit-banged USART mode is selected. */
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ISR(TIMER1_CAPT_vect, ISR_BLOCK)
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{
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/* Toggle CLOCK pin in a single cycle (see AVR datasheet) */
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BITBANG_TPICLOCK_PIN |= BITBANG_TPICLOCK_MASK;
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/* If not sending or receiving, just exit */
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if (!(SoftUSART_BitCount))
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return;
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/* Check to see if we are at a rising or falling edge of the clock */
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if (BITBANG_TPICLOCK_PORT & BITBANG_TPICLOCK_MASK)
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{
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/* If at rising clock edge and we are in send mode, abort */
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if (IsSending)
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return;
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/* Wait for the start bit when receiving */
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if ((SoftUSART_BitCount == BITS_IN_TPI_FRAME) && (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK))
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return;
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/* Shift in the bit one less than the frame size in position, so that the start bit will eventually
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* be discarded leaving the data to be byte-aligned for quick access */
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if (BITBANG_TPIDATA_PIN & BITBANG_TPIDATA_MASK)
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SoftUSART_Data |= (1 << (BITS_IN_TPI_FRAME - 1));
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SoftUSART_Data >>= 1;
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SoftUSART_BitCount--;
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}
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else
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{
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/* If at falling clock edge and we are in receive mode, abort */
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if (!IsSending)
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return;
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/* Set the data line to the next bit value */
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if (SoftUSART_Data & 0x01)
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BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
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else
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BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
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SoftUSART_Data >>= 1;
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SoftUSART_BitCount--;
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}
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}
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#endif
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/** Enables the target's TPI interface, holding the target in reset until TPI mode is exited. */
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void TPITarget_EnableTargetTPI(void)
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{
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/* Set /RESET line low for at least 90ns to enable TPI functionality */
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RESET_LINE_DDR |= RESET_LINE_MASK;
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RESET_LINE_PORT &= ~RESET_LINE_MASK;
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asm volatile ("NOP"::);
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asm volatile ("NOP"::);
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#if defined(TPI_VIA_HARDWARE_USART)
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/* Set Tx and XCK as outputs, Rx as input */
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DDRD |= (1 << 5) | (1 << 3);
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DDRD &= ~(1 << 2);
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/* Set up the synchronous USART for XMEGA communications -
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8 data bits, even parity, 2 stop bits */
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UBRR1 = (F_CPU / 1000000UL);
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UCSR1B = (1 << TXEN1);
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UCSR1C = (1 << UMSEL10) | (1 << UPM11) | (1 << USBS1) | (1 << UCSZ11) | (1 << UCSZ10) | (1 << UCPOL1);
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/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
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TPITarget_SendBreak();
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TPITarget_SendBreak();
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#else
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/* Set DATA and CLOCK lines to outputs */
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BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
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BITBANG_TPICLOCK_DDR |= BITBANG_TPICLOCK_MASK;
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/* Set DATA line high for idle state */
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BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
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/* Fire timer capture ISR every 100 cycles to manage the software USART */
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OCR1A = 80;
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TCCR1B = (1 << WGM13) | (1 << WGM12) | (1 << CS10);
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TIMSK1 = (1 << ICIE1);
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/* Send two BREAKs of 12 bits each to enable TPI interface (need at least 16 idle bits) */
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TPITarget_SendBreak();
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TPITarget_SendBreak();
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#endif
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}
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/** Disables the target's TPI interface, exits programming mode and starts the target's application. */
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void TPITarget_DisableTargetTPI(void)
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{
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#if defined(TPI_VIA_HARDWARE_USART)
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/* Turn off receiver and transmitter of the USART, clear settings */
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UCSR1A |= (1 << TXC1) | (1 << RXC1);
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UCSR1B = 0;
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UCSR1C = 0;
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/* Set all USART lines as input, tristate */
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DDRD &= ~((1 << 5) | (1 << 3));
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PORTD &= ~((1 << 5) | (1 << 3) | (1 << 2));
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#else
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/* Set DATA and CLOCK lines to inputs */
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BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;
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BITBANG_TPICLOCK_DDR &= ~BITBANG_TPICLOCK_MASK;
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||||
|
||||
/* Tristate DATA and CLOCK lines */
|
||||
BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
|
||||
BITBANG_TPICLOCK_PORT &= ~BITBANG_TPICLOCK_MASK;
|
||||
#endif
|
||||
|
||||
/* Tristate target /RESET line */
|
||||
RESET_LINE_DDR &= ~RESET_LINE_MASK;
|
||||
RESET_LINE_PORT &= ~RESET_LINE_MASK;
|
||||
}
|
||||
|
||||
/** Sends a byte via the USART.
|
||||
*
|
||||
* \param[in] Byte Byte to send through the USART
|
||||
*/
|
||||
void TPITarget_SendByte(const uint8_t Byte)
|
||||
{
|
||||
#if defined(TPI_VIA_HARDWARE_USART)
|
||||
/* Switch to Tx mode if currently in Rx mode */
|
||||
if (!(IsSending))
|
||||
{
|
||||
PORTD |= (1 << 3);
|
||||
DDRD |= (1 << 3);
|
||||
|
||||
UCSR1B |= (1 << TXEN1);
|
||||
UCSR1B &= ~(1 << RXEN1);
|
||||
|
||||
IsSending = true;
|
||||
}
|
||||
|
||||
/* Wait until there is space in the hardware Tx buffer before writing */
|
||||
while (!(UCSR1A & (1 << UDRE1)));
|
||||
UCSR1A |= (1 << TXC1);
|
||||
UDR1 = Byte;
|
||||
#else
|
||||
/* Switch to Tx mode if currently in Rx mode */
|
||||
if (!(IsSending))
|
||||
{
|
||||
BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
|
||||
BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
|
||||
|
||||
IsSending = true;
|
||||
}
|
||||
|
||||
/* Calculate the new USART frame data here while while we wait for a previous byte (if any) to finish sending */
|
||||
uint16_t NewUSARTData = ((1 << 11) | (1 << 10) | (0 << 9) | ((uint16_t)Byte << 1) | (0 << 0));
|
||||
|
||||
/* Compute Even parity - while a bit is still set, chop off lowest bit and toggle parity bit */
|
||||
uint8_t ParityData = Byte;
|
||||
while (ParityData)
|
||||
{
|
||||
NewUSARTData ^= (1 << 9);
|
||||
ParityData &= (ParityData - 1);
|
||||
}
|
||||
|
||||
/* Wait until transmitter is idle before writing new data */
|
||||
while (SoftUSART_BitCount);
|
||||
|
||||
/* Data shifted out LSB first, START DATA PARITY STOP STOP */
|
||||
SoftUSART_Data = NewUSARTData;
|
||||
SoftUSART_BitCount = BITS_IN_TPI_FRAME;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Receives a byte via the software USART, blocking until data is received.
|
||||
*
|
||||
* \return Received byte from the USART
|
||||
*/
|
||||
uint8_t TPITarget_ReceiveByte(void)
|
||||
{
|
||||
#if defined(TPI_VIA_HARDWARE_USART)
|
||||
/* Switch to Rx mode if currently in Tx mode */
|
||||
if (IsSending)
|
||||
{
|
||||
while (!(UCSR1A & (1 << TXC1)));
|
||||
UCSR1A |= (1 << TXC1);
|
||||
|
||||
UCSR1B &= ~(1 << TXEN1);
|
||||
UCSR1B |= (1 << RXEN1);
|
||||
|
||||
DDRD &= ~(1 << 3);
|
||||
PORTD &= ~(1 << 3);
|
||||
|
||||
IsSending = false;
|
||||
}
|
||||
|
||||
/* Wait until a byte has been received before reading */
|
||||
while (!(UCSR1A & (1 << RXC1)));
|
||||
return UDR1;
|
||||
#else
|
||||
/* Switch to Rx mode if currently in Tx mode */
|
||||
if (IsSending)
|
||||
{
|
||||
while (SoftUSART_BitCount);
|
||||
|
||||
BITBANG_TPIDATA_DDR &= ~BITBANG_TPIDATA_MASK;
|
||||
BITBANG_TPIDATA_PORT &= ~BITBANG_TPIDATA_MASK;
|
||||
|
||||
IsSending = false;
|
||||
}
|
||||
|
||||
/* Wait until a byte has been received before reading */
|
||||
SoftUSART_BitCount = BITS_IN_TPI_FRAME;
|
||||
while (SoftUSART_BitCount);
|
||||
|
||||
/* Throw away the parity and stop bits to leave only the data (start bit is already discarded) */
|
||||
return (uint8_t)SoftUSART_Data;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Sends a BREAK via the USART to the attached target, consisting of a full frame of idle bits. */
|
||||
void TPITarget_SendBreak(void)
|
||||
{
|
||||
#if defined(TPI_VIA_HARDWARE_USART)
|
||||
/* Switch to Tx mode if currently in Rx mode */
|
||||
if (!(IsSending))
|
||||
{
|
||||
PORTD |= (1 << 3);
|
||||
DDRD |= (1 << 3);
|
||||
|
||||
UCSR1B &= ~(1 << RXEN1);
|
||||
UCSR1B |= (1 << TXEN1);
|
||||
|
||||
IsSending = true;
|
||||
}
|
||||
|
||||
/* Need to do nothing for a full frame to send a BREAK */
|
||||
for (uint8_t i = 0; i < BITS_IN_TPI_FRAME; i++)
|
||||
{
|
||||
/* Wait for a full cycle of the clock */
|
||||
while (PIND & (1 << 5));
|
||||
while (!(PIND & (1 << 5)));
|
||||
}
|
||||
#else
|
||||
/* Switch to Tx mode if currently in Rx mode */
|
||||
if (!(IsSending))
|
||||
{
|
||||
BITBANG_TPIDATA_PORT |= BITBANG_TPIDATA_MASK;
|
||||
BITBANG_TPIDATA_DDR |= BITBANG_TPIDATA_MASK;
|
||||
|
||||
IsSending = true;
|
||||
}
|
||||
|
||||
while (SoftUSART_BitCount);
|
||||
|
||||
/* Need to do nothing for a full frame to send a BREAK */
|
||||
SoftUSART_Data = 0x0FFF;
|
||||
SoftUSART_BitCount = BITS_IN_TPI_FRAME;
|
||||
#endif
|
||||
}
|
||||
|
||||
/** Busy-waits while the NVM controller is busy performing a NVM operation, such as a FLASH page read or CRC
|
||||
* calculation.
|
||||
*
|
||||
* \return Boolean true if the NVM controller became ready within the timeout period, false otherwise
|
||||
*/
|
||||
bool TPITarget_WaitWhileNVMBusBusy(void)
|
||||
{
|
||||
// TODO
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
#endif
|
|
@ -0,0 +1,81 @@
|
|||
/*
|
||||
LUFA Library
|
||||
Copyright (C) Dean Camera, 2009.
|
||||
|
||||
dean [at] fourwalledcubicle [dot] com
|
||||
www.fourwalledcubicle.com
|
||||
*/
|
||||
|
||||
/*
|
||||
Copyright 2009 Dean Camera (dean [at] fourwalledcubicle [dot] com)
|
||||
|
||||
Permission to use, copy, modify, and distribute this software
|
||||
and its documentation for any purpose and without fee is hereby
|
||||
granted, provided that the above copyright notice appear in all
|
||||
copies and that both that the copyright notice and this
|
||||
permission notice and warranty disclaimer appear in supporting
|
||||
documentation, and that the name of the author not be used in
|
||||
advertising or publicity pertaining to distribution of the
|
||||
software without specific, written prior permission.
|
||||
|
||||
The author disclaim all warranties with regard to this
|
||||
software, including all implied warranties of merchantability
|
||||
and fitness. In no event shall the author be liable for any
|
||||
special, indirect or consequential damages or any damages
|
||||
whatsoever resulting from loss of use, data or profits, whether
|
||||
in an action of contract, negligence or other tortious action,
|
||||
arising out of or in connection with the use or performance of
|
||||
this software.
|
||||
*/
|
||||
|
||||
/** \file
|
||||
*
|
||||
* Header file for TPITarget.c.
|
||||
*/
|
||||
|
||||
#ifndef _TPI_TARGET_
|
||||
#define _TPI_TARGET_
|
||||
|
||||
/* Includes: */
|
||||
#include <avr/io.h>
|
||||
#include <avr/interrupt.h>
|
||||
#include <stdbool.h>
|
||||
|
||||
#include <LUFA/Common/Common.h>
|
||||
|
||||
/* Preprocessor Checks: */
|
||||
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
|
||||
#undef ENABLE_ISP_PROTOCOL
|
||||
#undef ENABLE_TPI_PROTOCOL
|
||||
|
||||
#if !defined(ENABLE_PDI_PROTOCOL)
|
||||
#define ENABLE_PDI_PROTOCOL
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* Defines: */
|
||||
#define BITBANG_TPIDATA_PORT PORTB
|
||||
#define BITBANG_TPIDATA_DDR DDRB
|
||||
#define BITBANG_TPIDATA_PIN PINB
|
||||
#define BITBANG_TPIDATA_MASK (1 << 3)
|
||||
|
||||
#define BITBANG_TPICLOCK_PORT PORTB
|
||||
#define BITBANG_TPICLOCK_DDR DDRB
|
||||
#define BITBANG_TPICLOCK_PIN PINB
|
||||
#define BITBANG_TPICLOCK_MASK (1 << 1)
|
||||
|
||||
#define BITS_IN_TPI_FRAME 12
|
||||
|
||||
#define TPI_NVM_TIMEOUT_MS 200
|
||||
|
||||
#define TPI_NVMENABLE_KEY (uint8_t[]){0x12, 0x89, 0xAB, 0x45, 0xCD, 0xD8, 0x88, 0xFF}
|
||||
|
||||
/* Function Prototypes: */
|
||||
void TPITarget_EnableTargetTPI(void);
|
||||
void TPITarget_DisableTargetTPI(void);
|
||||
void TPITarget_SendByte(const uint8_t Byte);
|
||||
uint8_t TPITarget_ReceiveByte(void);
|
||||
void TPITarget_SendBreak(void);
|
||||
bool TPITarget_WaitWhileNVMBusBusy(void);
|
||||
|
||||
#endif
|
|
@ -49,6 +49,7 @@
|
|||
/* Preprocessor Checks: */
|
||||
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
|
||||
#undef ENABLE_ISP_PROTOCOL
|
||||
#undef ENABLE_TPI_PROTOCOL
|
||||
|
||||
#if !defined(ENABLE_PDI_PROTOCOL)
|
||||
#define ENABLE_PDI_PROTOCOL
|
||||
|
|
|
@ -49,6 +49,7 @@
|
|||
/* Preprocessor Checks: */
|
||||
#if ((BOARD == BOARD_XPLAIN) || (BOARD == BOARD_XPLAIN_REV1))
|
||||
#undef ENABLE_ISP_PROTOCOL
|
||||
#undef ENABLE_TPI_PROTOCOL
|
||||
|
||||
#if !defined(ENABLE_PDI_PROTOCOL)
|
||||
#define ENABLE_PDI_PROTOCOL
|
|
@ -133,7 +133,8 @@ SRC = $(TARGET).c \
|
|||
Lib/ISPTarget.c \
|
||||
Lib/PDIProtocol.c \
|
||||
Lib/PDITarget.c \
|
||||
Lib/NVMTarget.c \
|
||||
Lib/XMEGANVM.c \
|
||||
Lib/TPITarget.c \
|
||||
$(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/DevChapter9.c \
|
||||
$(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Endpoint.c \
|
||||
$(LUFA_PATH)/LUFA/Drivers/USB/LowLevel/Host.c \
|
||||
|
@ -197,6 +198,7 @@ CDEFS += -DRESET_LINE_MASK="(1 << 4)"
|
|||
CDEFS += -DVTARGET_ADC_CHANNEL=2
|
||||
CDEFS += -DENABLE_ISP_PROTOCOL
|
||||
CDEFS += -DENABLE_PDI_PROTOCOL
|
||||
CDEFS += -DENABLE_TPI_PROTOCOL
|
||||
|
||||
|
||||
# Place -D or -U options here for ASM sources
|
||||
|
|
Loading…
Reference in New Issue