forked from mfulz_github/qmk_firmware
Clean up and add more comments to the AVRISP-MKII project. Make sure the SPI_MULTI command handler supports multiple packet responses. Use slightly smaller/faster repeated indirect-load commands when retrieving the PDI target's memory CRCs.
This commit is contained in:
Dean Camera
parent
b0ce1eab66
commit
f3d370a777
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@ -40,8 +40,8 @@
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* listed here. If an event with no user-associated handler is fired within the library, it by default maps to an
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* internal empty stub function.
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*
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* Each event must only have one associated event handler, but can be raised by multiple sources by calling the event
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* name just like any regular C function (with any required event parameters).
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* Each event must only have one associated event handler, but can be raised by multiple sources by calling the
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* event handler function (with any required event parameters).
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*
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* @{
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*/
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@ -233,19 +233,25 @@
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* \note This event does not exist if the USB_HOST_ONLY token is supplied to the compiler (see
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* \ref Group_USBManagement documentation).
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*
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* \note This event does not exist on the series 2 USB AVRs when the NO_LIMITED_CONTROLLER_CONNECT
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* compile time token is not set - see \ref EVENT_USB_Device_Disconnect.
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*
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* \see \ref EVENT_USB_Device_WakeUp() event for accompanying Wake Up event.
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*/
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void EVENT_USB_Device_Suspend(void);
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/** Event for USB wake up. This event fires when a the USB interface is suspended while in device
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* mode, and the host wakes up the device by supplying Start Of Frame pulses. This is generally
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* hooked to pull the user application out of a lowe power state and back into normal operating
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* hooked to pull the user application out of a low power state and back into normal operating
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* mode. If the USB interface is enumerated with the \ref USB_OPT_AUTO_PLL option set, the library
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* will automatically restart the USB PLL before the event is fired.
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*
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* \note This event does not exist if the USB_HOST_ONLY token is supplied to the compiler (see
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* \ref Group_USBManagement documentation).
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*
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* \note This event does not exist on the series 2 USB AVRs when the NO_LIMITED_CONTROLLER_CONNECT
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* compile time token is not set - see \ref EVENT_USB_Device_Connect.
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*
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* \see \ref EVENT_USB_Device_Suspend() event for accompanying Suspend event.
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*/
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void EVENT_USB_Device_WakeUp(void);
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@ -151,9 +151,9 @@ USB_Descriptor_String_t PROGMEM ManufacturerString =
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*/
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USB_Descriptor_String_t PROGMEM ProductString =
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{
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.Header = {.Size = USB_STRING_LEN(33), .Type = DTYPE_String},
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.Header = {.Size = USB_STRING_LEN(22), .Type = DTYPE_String},
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.UnicodeString = L"LUFA AVRISP MkII Clone Programmer"
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.UnicodeString = L"LUFA AVRISP MkII Clone"
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};
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USB_Descriptor_String_t PROGMEM SerialString =
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@ -65,7 +65,9 @@ void ISPProtocol_EnterISPMode(void)
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ISPProtocol_DelayMS(Enter_ISP_Params.ExecutionDelayMS);
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SPI_Init(ISPTarget_GetSPIPrescalerMask() | SPI_SCK_LEAD_RISING | SPI_SAMPLE_LEADING | SPI_MODE_MASTER);
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/* Continuously attempt to synchronize with the target until either the number of attempts specified
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* by the host has exceeded, or the the device sends back the expected response values */
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while (Enter_ISP_Params.SynchLoops-- && (ResponseStatus == STATUS_CMD_FAILED))
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{
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uint8_t ResponseBytes[4];
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@ -110,6 +112,7 @@ void ISPProtocol_LeaveISPMode(void)
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Endpoint_ClearOUT();
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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/* Perform pre-exit delay, release the target /RESET, disable the SPI bus and perform the post-exit delay */
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ISPProtocol_DelayMS(Leave_ISP_Params.PreDelayMS);
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ISPTarget_ChangeTargetResetLine(false);
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SPI_ShutDown();
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@ -166,6 +169,9 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
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Write_Memory_Params.PollValue2;
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uint8_t* NextWriteByte = Write_Memory_Params.ProgData;
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/* Check to see if the host has issued a SET ADDRESS command and we haven't sent a
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* LOAD EXTENDED ADDRESS command (if needed, used when operating beyond the 128KB
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* FLASH barrier) */
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if (MustSetAddress)
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{
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if (CurrentAddress & (1UL << 31))
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@ -174,6 +180,7 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
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MustSetAddress = false;
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}
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/* Check the programming mode desired by the host, either Paged or Word memory writes */
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if (Write_Memory_Params.ProgrammingMode & PROG_MODE_PAGED_WRITES_MASK)
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{
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uint16_t StartAddress = (CurrentAddress & 0xFFFF);
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@ -184,16 +191,16 @@ void ISPProtocol_ProgramMemory(uint8_t V2Command)
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bool IsOddByte = (CurrentByte & 0x01);
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uint8_t ByteToWrite = *(NextWriteByte++);
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if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))
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Write_Memory_Params.ProgrammingCommands[0] |= READ_WRITE_HIGH_BYTE_MASK;
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else
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Write_Memory_Params.ProgrammingCommands[0] &= ~READ_WRITE_HIGH_BYTE_MASK;
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SPI_SendByte(Write_Memory_Params.ProgrammingCommands[0]);
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SPI_SendByte(CurrentAddress >> 8);
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SPI_SendByte(CurrentAddress & 0xFF);
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SPI_SendByte(ByteToWrite);
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/* AVR FLASH addressing requires us to modify the write command based on if we are writing a high
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* or low byte at the current word address */
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Write_Memory_Params.ProgrammingCommands[0] ^= READ_WRITE_HIGH_BYTE_MASK;
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/* Check to see the write completion method, to see if we have a valid polling address */
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if (!(PollAddress) && (ByteToWrite != PollValue))
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{
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if (IsOddByte && (V2Command == CMD_PROGRAM_FLASH_ISP))
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@ -289,6 +296,9 @@ void ISPProtocol_ReadMemory(uint8_t V2Command)
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Endpoint_Write_Byte(V2Command);
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Endpoint_Write_Byte(STATUS_CMD_OK);
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/* Check to see if the host has issued a SET ADDRESS command and we haven't sent a
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* LOAD EXTENDED ADDRESS command (if needed, used when operating beyond the 128KB
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* FLASH barrier) */
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if (MustSetAddress)
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{
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if (CurrentAddress & (1UL << 31))
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@ -297,28 +307,30 @@ void ISPProtocol_ReadMemory(uint8_t V2Command)
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MustSetAddress = false;
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}
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/* Read each byte from the device and write them to the packet for the host */
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for (uint16_t CurrentByte = 0; CurrentByte < Read_Memory_Params.BytesToRead; CurrentByte++)
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{
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bool IsOddByte = (CurrentByte & 0x01);
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if (IsOddByte && (V2Command == CMD_READ_FLASH_ISP))
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Read_Memory_Params.ReadMemoryCommand |= READ_WRITE_HIGH_BYTE_MASK;
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else
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Read_Memory_Params.ReadMemoryCommand &= ~READ_WRITE_HIGH_BYTE_MASK;
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/* Read the next byte from the desired memory space in the device */
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SPI_SendByte(Read_Memory_Params.ReadMemoryCommand);
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SPI_SendByte(CurrentAddress >> 8);
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SPI_SendByte(CurrentAddress & 0xFF);
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Endpoint_Write_Byte(SPI_ReceiveByte());
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/* Check if the endpoint bank is currently full */
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/* Check if the endpoint bank is currently full, if so send the packet */
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if (!(Endpoint_IsReadWriteAllowed()))
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{
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Endpoint_ClearIN();
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Endpoint_WaitUntilReady();
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}
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if ((IsOddByte && (V2Command == CMD_READ_FLASH_ISP)) || (V2Command == CMD_READ_EEPROM_ISP))
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/* AVR FLASH addressing requires us to modify the read command based on if we are reading a high
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* or low byte at the current word address */
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if (V2Command == CMD_READ_FLASH_ISP)
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Read_Memory_Params.ReadMemoryCommand ^= READ_WRITE_HIGH_BYTE_MASK;
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/* Only increment the current address if we have read both bytes in the current word when in FLASH
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* read mode, or for each byte when in EEPROM read mode */
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if (((CurrentByte & 0x01) && (V2Command == CMD_READ_FLASH_ISP)) || (V2Command == CMD_READ_EEPROM_ISP))
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CurrentAddress++;
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}
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@ -353,9 +365,11 @@ void ISPProtocol_ChipErase(void)
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uint8_t ResponseStatus = STATUS_CMD_OK;
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/* Send the chip erase commands as given by the host to the device */
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for (uint8_t SByte = 0; SByte < sizeof(Erase_Chip_Params.EraseCommandBytes); SByte++)
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SPI_SendByte(Erase_Chip_Params.EraseCommandBytes[SByte]);
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/* Use appropriate command completion check as given by the host (delay or busy polling) */
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if (!(Erase_Chip_Params.PollMethod))
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ISPProtocol_DelayMS(Erase_Chip_Params.EraseDelayMS);
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else
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@ -385,7 +399,8 @@ void ISPProtocol_ReadFuseLockSigOSCCAL(uint8_t V2Command)
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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uint8_t ResponseBytes[4];
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/* Send the Fuse or Lock byte read commands as given by the host to the device, store response */
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for (uint8_t RByte = 0; RByte < sizeof(ResponseBytes); RByte++)
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ResponseBytes[RByte] = SPI_TransferByte(Read_FuseLockSigOSCCAL_Params.ReadCommandBytes[RByte]);
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@ -413,6 +428,7 @@ void ISPProtocol_WriteFuseLock(uint8_t V2Command)
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Endpoint_ClearOUT();
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Endpoint_SetEndpointDirection(ENDPOINT_DIR_IN);
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/* Send the Fuse or Lock byte program commands as given by the host to the device */
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for (uint8_t SByte = 0; SByte < sizeof(Write_FuseLockSig_Params.WriteCommandBytes); SByte++)
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SPI_SendByte(Write_FuseLockSig_Params.WriteCommandBytes[SByte]);
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@ -463,12 +479,29 @@ void ISPProtocol_SPIMulti(void)
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Endpoint_Write_Byte(SPI_TransferByte(SPI_Multi_Params.TxData[CurrTxPos++]));
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else
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Endpoint_Write_Byte(SPI_ReceiveByte());
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/* Check to see if we have filled the endpoint bank and need to send the packet */
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if (!(Endpoint_IsReadWriteAllowed()))
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{
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Endpoint_ClearIN();
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Endpoint_WaitUntilReady();
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}
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CurrRxPos++;
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}
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Endpoint_Write_Byte(STATUS_CMD_OK);
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bool IsEndpointFull = !(Endpoint_IsReadWriteAllowed());
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Endpoint_ClearIN();
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/* Ensure last packet is a short packet to terminate the transfer */
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if (IsEndpointFull)
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{
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Endpoint_WaitUntilReady();
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Endpoint_ClearIN();
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Endpoint_WaitUntilReady();
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}
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}
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#endif
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@ -58,6 +58,7 @@ void V2Protocol_ProcessCommand(void)
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{
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uint8_t V2Command = Endpoint_Read_Byte();
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/* Set total command processing timeout value, enable timeout management interrupt */
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TimeoutMSRemaining = COMMAND_TIMEOUT_MS;
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TIMSK0 |= (1 << OCIE0A);
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@ -121,6 +122,7 @@ void V2Protocol_ProcessCommand(void)
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break;
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}
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/* Disable timeout management interrupt once processing has completed */
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TIMSK0 &= ~(1 << OCIE0A);
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Endpoint_WaitUntilReady();
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@ -162,8 +164,8 @@ static void V2Protocol_SignOn(void)
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Endpoint_ClearIN();
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}
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/** Handler for the CMD_RESET_PROTECTION command, currently implemented as a dummy ACK function
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* as no ISP short-circuit protection is currently implemented.
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/** Handler for the CMD_RESET_PROTECTION command, implemented as a dummy ACK function as
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* no target short-circuit protection is currently implemented.
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*/
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static void V2Protocol_ResetProtection(void)
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{
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@ -170,7 +170,7 @@ static ParameterItem_t* V2Params_GetParamFromTable(const uint8_t ParamID)
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ParameterItem_t* CurrTableItem = ParameterTable;
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/* Find the parameter in the parameter table if present */
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for (uint8_t TableIndex = 0; TableIndex < (sizeof(ParameterTable) / sizeof(ParameterTable[0])); TableIndex++)
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for (uint8_t TableIndex = 0; TableIndex < TABLE_PARAM_COUNT; TableIndex++)
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{
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if (ParamID == CurrTableItem->ParamID)
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return CurrTableItem;
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@ -52,10 +52,13 @@
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/* Macros: */
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/** Parameter privilege mask to allow the host PC to read the parameter's value */
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#define PARAM_PRIV_READ (1 << 0)
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#define PARAM_PRIV_READ (1 << 0)
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/** Parameter privilege mask to allow the host PC to change the parameter's value */
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#define PARAM_PRIV_WRITE (1 << 1)
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#define PARAM_PRIV_WRITE (1 << 1)
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/** Total number of parameters in the parameter table */
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#define TABLE_PARAM_COUNT (sizeof(ParameterTable) / sizeof(ParameterTable[0]))
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/* Type Defines: */
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/** Type define for a parameter table entry indicating a PC readable or writable device parameter. */
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@ -136,24 +136,18 @@ bool XMEGANVM_GetMemoryCRC(const uint8_t CRCCommand, uint32_t* const CRCDest)
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if (!(XMEGANVM_WaitWhileNVMControllerBusy()))
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return false;
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uint32_t MemoryCRC = 0;
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/* Read the first generated CRC byte value */
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XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
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/* Load the PDI pointer register with the DAT0 register start address */
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XPROGTarget_SendByte(PDI_CMD_ST | (PDI_POINTER_DIRECT << 2) | PDI_DATSIZE_4BYTES);
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XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT0);
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MemoryCRC = XPROGTarget_ReceiveByte();
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/* Read the second generated CRC byte value */
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XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
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XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT1);
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MemoryCRC |= ((uint16_t)XPROGTarget_ReceiveByte() << 8);
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/* Read the third generated CRC byte value */
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XPROGTarget_SendByte(PDI_CMD_LDS | (PDI_DATSIZE_4BYTES << 2));
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XMEGANVM_SendNVMRegAddress(XMEGA_NVM_REG_DAT2);
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MemoryCRC |= ((uint32_t)XPROGTarget_ReceiveByte() << 16);
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/* Send the REPEAT command to grab the CRC bytes */
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XPROGTarget_SendByte(PDI_CMD_REPEAT | PDI_DATSIZE_1BYTE);
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XPROGTarget_SendByte(XMEGA_CRC_LENGTH - 1);
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*CRCDest = MemoryCRC;
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/* Read in the CRC bytes from the target */
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XPROGTarget_SendByte(PDI_CMD_LD | (PDI_POINTER_INDIRECT_PI << 2) | PDI_DATSIZE_1BYTE);
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for (uint8_t i = 0; i < XMEGA_CRC_LENGTH; i++)
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((uint8_t*)CRCDest)[i] = XPROGTarget_ReceiveByte();
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return true;
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}
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@ -56,6 +56,8 @@
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#endif
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/* Defines: */
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#define XMEGA_CRC_LENGTH 3
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#define XMEGA_NVM_REG_ADDR0 0x00
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#define XMEGA_NVM_REG_ADDR1 0x01
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#define XMEGA_NVM_REG_ADDR2 0x02
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@ -38,7 +38,7 @@
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#if defined(ENABLE_XPROG_PROTOCOL) || defined(__DOXYGEN__)
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/** Base absolute address for the target's NVM controller for PDI programming */
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uint32_t XPROG_Param_NVMBase = 0x010001C0;
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uint32_t XPROG_Param_NVMBase = 0x010001C0;
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/** Size in bytes of the target's EEPROM page */
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uint16_t XPROG_Param_EEPageSize;
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@ -455,10 +455,10 @@ static void XPROGProtocol_SetParam(void)
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case XPRG_PARAM_EEPPAGESIZE:
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XPROG_Param_EEPageSize = Endpoint_Read_Word_BE();
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break;
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case XPRG_PARAM_NVMCMD:
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case XPRG_PARAM_NVMCMD_REG:
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XPROG_Param_NVMCMDRegAddr = Endpoint_Read_Byte();
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break;
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case XPRG_PARAM_NVMCSR:
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case XPRG_PARAM_NVMCSR_REG:
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XPROG_Param_NVMCSRRegAddr = Endpoint_Read_Byte();
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break;
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default:
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@ -98,12 +98,12 @@
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#define XPRG_PARAM_NVMBASE 0x01
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#define XPRG_PARAM_EEPPAGESIZE 0x02
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#define XPRG_PARAM_NVMCMD 0x03
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#define XPRG_PARAM_NVMCSR 0x04
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#define XPRG_PARAM_NVMCMD_REG 0x03 /* Undocumented, Reverse-engineered */
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#define XPRG_PARAM_NVMCSR_REG 0x04 /* Undocumented, Reverse-engineered */
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#define XPRG_PROTOCOL_PDI 0x00
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#define XPRG_PROTOCOL_JTAG 0x01
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#define XPRG_PROTOCOL_TPI 0x02
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#define XPRG_PROTOCOL_TPI 0x02 /* Undocumented, Reverse-engineered */
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#define XPRG_PAGEMODE_WRITE (1 << 1)
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#define XPRG_PAGEMODE_ERASE (1 << 0)
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