mfulz_github/qmk_firmware
1
0
Fork 1
mirror of https://github.com/mfulz/qmk_firmware.git synced 2025-10-31 13:22:31 +01:00
Code Issues Projects Releases Wiki Activity

[Keyboard] Fix issues with 3w6 rev2 matrix (#14346)

Browse Source
This commit is contained in:
Drashna Jaelre 2021-09-07 18:53:55 -07:00 committed by GitHub
parent 60c5bd7b5e
commit 0b8d6df390
No known key found for this signature in database
GPG Key ID: 4AEE18F83AFDEB23
1 changed files with 10 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
keyboards/3w6/rev2/matrix.c
View File

@ -187,14 +187,11 @@ static matrix_row_t read_cols(uint8_t row) {
} else { } else {
uint8_t data = 0; uint8_t data = 0;
uint8_t port0 = 0; uint8_t port0 = 0;
tca9555_status = i2c_readReg(I2C_ADDR, IREGP0, port0, 1, I2C_TIMEOUT); tca9555_status = i2c_readReg(I2C_ADDR, IREGP0, &port0, 1, I2C_TIMEOUT);
if (tca9555_status) { // if there was an error if (tca9555_status) { // if there was an error
// do nothing // do nothing
return 0; return 0;
} else { } else {
uint8_t port0 = ports[0];
uint8_t port1 = ports[1];
// We read all the pins on GPIOA. // We read all the pins on GPIOA.
// The initial state was all ones and any depressed key at a given column for the currently selected row will have its bit flipped to zero. // The initial state was all ones and any depressed key at a given column for the currently selected row will have its bit flipped to zero.
// The return value is a row as represented in the generic matrix code were the rightmost bits represent the lower columns and zeroes represent non-depressed keys while ones represent depressed keys. // The return value is a row as represented in the generic matrix code were the rightmost bits represent the lower columns and zeroes represent non-depressed keys while ones represent depressed keys.
@ -244,11 +241,13 @@ static void select_row(uint8_t row) {
case 4: port1 &= ~(1 << 0); break; case 4: port1 &= ~(1 << 0); break;
case 5: port1 &= ~(1 << 1); break; case 5: port1 &= ~(1 << 1); break;
case 6: port1 &= ~(1 << 2); break; case 6: port1 &= ~(1 << 2); break;
case 7: port0 &= ~(1 << 5); break; case 7:
port1 &= ~(1 << 3);
break;
default: break; default: break;
} }
tca9555_status = i2c_writeReg(I2C_ADDR, OREGP1, port1, 2, I2C_TIMEOUT); tca9555_status = i2c_writeReg(I2C_ADDR, OREGP1, &port1, 2, I2C_TIMEOUT);
// Select the desired row by writing a byte for the entire GPIOB bus where only the bit representing the row we want to select is a zero (write instruction) and every other bit is a one. // Select the desired row by writing a byte for the entire GPIOB bus where only the bit representing the row we want to select is a zero (write instruction) and every other bit is a one.
// Note that the row - MATRIX_ROWS_PER_SIDE reflects the fact that being on the right hand, the columns are numbered from MATRIX_ROWS_PER_SIDE to MATRIX_ROWS, but the pins we want to write to are indexed from zero up on the GPIOB bus. // Note that the row - MATRIX_ROWS_PER_SIDE reflects the fact that being on the right hand, the columns are numbered from MATRIX_ROWS_PER_SIDE to MATRIX_ROWS, but the pins we want to write to are indexed from zero up on the GPIOB bus.
} }