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Make XPLAINBridge serial bridge much more reliable for the reception of characters from the XMEGA through the software UART interface.

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This commit is contained in:
Dean Camera 2010-06-24 08:12:27 +00:00
parent ad29e79b94
commit 55d7e1e65b
1 changed files with 5 additions and 11 deletions
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10
Projects/XPLAINBridge/Lib/SoftUART.c
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@ -79,19 +79,13 @@ ISR(INT0_vect, ISR_BLOCK)
RX_Data = 0;
RX_BitMask = (1 << 0);
/* Check that the start bit is still low to prevent noise from triggering a reception */
if (!(SRXPIN & (1 << SRX)))
{
/* Clear reception channel ISR flag in case it is pending */
/* Clear reception channel ISR flag and enable the bit reception ISR */
TIFR1 = (1 << OCF1A);
/* Still low, enable bit receive ISR */
TIMSK1 = (1 << OCIE1A);
/* Clear the start bit detection ISR flag */
/* Disable start bit detection ISR while the next byte is received */
EIMSK &= ~(1 << INT0);
}
}
/** ISR to manage the reception of bits to the software UART. */
ISR(TIMER1_COMPA_vect, ISR_BLOCK)