forked from mfulz_github/qmk_firmware
Use default NVM base address in the AVRISP programmer project in case the host programmer software doesn't set it correctly.
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4f74075fad
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461607020c
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@ -61,7 +61,7 @@
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* - Fixed the definition of the Endpoint_BytesInEndpoint() macro for the U4 series AVR parts
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* - Fixed MIDI host Class driver MIDI_Host_SendEventPacket() routine not properly checking for Pipe ready before writing
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* - Fixed use of deprecated struct initializers, removed library unused parameter warnings when compiled with -Wextra enabled
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* - Fixed Still Image Host Class driver truncating the PIMA response code (thanks to Daniel)
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* - Fixed Still Image Host Class driver truncating the PIMA response code (thanks to Daniel Seibert)
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*
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* \section Sec_ChangeLog091122 Version 091122
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*
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@ -38,7 +38,7 @@
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#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
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/** Base absolute address for the target's NVM controller */
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uint32_t XPROG_Param_NVMBase;
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uint32_t XPROG_Param_NVMBase = 0x010001C0;
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/** Size in bytes of the target's EEPROM page */
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uint32_t XPROG_Param_EEPageSize;
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@ -39,14 +39,15 @@
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#if defined(ENABLE_PDI_PROTOCOL) || defined(__DOXYGEN__)
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/** Flag to indicate if the USART is currently in Tx or Rx mode. */
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volatile bool IsSending;
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volatile bool IsSending;
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#if !defined(PDI_VIA_HARDWARE_USART)
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/** Software USART raw frame bits for transmission/reception. */
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volatile uint16_t SoftUSART_Data;
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volatile uint16_t SoftUSART_Data;
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/** Bits remaining to be sent or received via the software USART - set as a GPIOR for speed. */
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#define SoftUSART_BitCount GPIOR2
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#define SoftUSART_BitCount GPIOR2
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/** ISR to manage the software USART when bit-banged USART mode is selected. */
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ISR(TIMER1_COMPA_vect, ISR_BLOCK)
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